Virtual memory fundamentals, I
Consider a (small) machine with a 11-bit virtual addresses, in which 8 bits are used for the VPN. (Assume that the machine is byte-addressable, as with all of the examples we have seen.)
What is the size of the virtual address space, in bytes?
Virtual memory fundamentals, II
Consider a (huge) machine that has 60-bit virtual addresses, a page size of 1 terabyte (1 TB, or 240 bytes), and 52-bit physical addresses.
- How many bits is the VPN (virtual page number)?
- How many bits is the PPN (physical page number)?
- How many bits is the offset?
Page faults and permissions
For the statements below, please state whether they are true Always, Sometimes, or Never. Justify each answer.
- "On the x86, if a given memory reference (load or store) causes a page fault exception, then that memory reference also causes a TLB miss."
- "On the x86, if a given memory reference from user mode results in a TLB miss, then the memory reference also causes a page fault."
- "On the x86, if a given memory reference from kernel mode results in a TLB miss, then the memory reference also causes a page fault."
- "On the x86, if a page table entry's
PTE_P
andPTE_U
bits are set, then it is permissible for the process to load from a virtual address in the corresponding virtual page." - "On the x86, if a page table entry's
PTE_P
andPTE_U
bits are set, then it is permissible for the process to store to a virtual address in the corresponding virtual page."
TLB, page faults
Assume that the assembly code below is executed after a context switch. Make the following additional assumptions:
- The TLB is flushed (emptied) after context switch.
- Suppose all data pages (in the example below: 0x200000, 0x300000) are stored on disk when instruction 0x500 is executing.
- There is no prefetching.
[context switch]
0x500 movq 0x200000, %rax # move data in address 0x200000 to register %rax
0x504 incq %rax, 1 # add one to %rax
0x508 movq %rax, 0x300000 # move register %rax to memory at address 0x300000
Answer the following questions:
- How many TLB misses will happen, and for which pages?
- How many page faults will happen, and for which pages?
Handing in the homework
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