HW8 Solutions

1.1
    Five. One for code loading. Two for data page 0x200000, and two for
    data page 0x300000. Why does each data page generate two TLB misses?
    When virtual address 0x200000 (for example) is referenced, there is
    a TLB miss (because the page was not present in virtual memory and
    so would not be in the TLB); then, when the page actually swaps into
    memory and the instruction is retried, there is another TLB miss.
    See section 21.5 in the book for more details. 

1.2
    Two page faults

2. First read the first int of the first page, then the first int of
the second page (to create a new TLB entry), and so on through all six
pages (this is the inner loop below, with i=0). Then read the second int of
the first page, the second int of the second page, and so on through all
six pages. This access pattern is reflected in the code below:

    uint64_t tlb_unfriendly() {

        int *a = page_alloc(6 * PAGE_SIZE); 
        populate_array(a); // sets the integers in the array
        uint64_t sum = 0;

        /* YOUR CODE HERE: compute sum in the most TLB-unfriendly way possible */

        for (int i = 0; i < PAGESIZE/sizeof(int); i++) 
            for (int j = 0;  j < 6; j++) 
                sum += a[j*PAGESIZE/sizeof(int) + i];

        return sum;
    }


3. Lay out the allocated memory so that the last legitimately allocated
byte is on the last byte of the allocated page (this "wastes" the first
part of a page).  Mark the next virtual page (past the array) as "not
in use" (this does not cost physical memory). At that point, memory
references past the end of the array will generate page faults.

4.1

    3 entries. The page size is 4096, so map1 consumes 2 entries, and map2
    consumes one entry.

4.2

    2 pages. The 3 virtual pages map to two physical pages in the OS buffer
    cache.