CS202: HW 7: virtual memory, WeensyOS

CS202: HW 7: virtual memory, WeensyOS

These problems should be done on your own. They are not to be turned in. Getting help from AI (besides being ruled out by the course policies) will actually hurt you, since the point of these questions isn’t so you can deliver an answer somewhere and check a box; it’s for you to gain the practice and experience of working through the problems. You will need that general skill (of absorbing something by practicing it) in life, and in this semester you will need the specific problem-solving skills that are emphasized in these homeworks.

WeensyOS

Begin Weensy OS:

  • Read the lab 4 description. Seriously, read it. (As opposed to skimming it.)

  • Fetch and build the code.

  • Now answer:

    • Where in physical memory—which pages or addresses—does the kernel’s code and data live? Give the range in hex. (Hint: you do not need to look at the code; you can simply make run or make run-console and read it off the graphical memory maps.)

    • What physical address does the kernel’s stack live on?

  • Same two question as above, for virtual memory: what are the virtual addresses of the kernel’s code and data, and at what virtual address does the kernel’s stack live in virtual memory?

  • Use the constants and macros given in the assignment (in the sections “Memory system layout” and “Writing expressions for addresses”) to write an expression for the number of physical pages in memory. This will be handy to have as you begin coding the lab.

x86-64 multilevel page tables

Consider the x86-64 architecture. Below we are asking about the physical pages consumed by a process, including the page tables themselves. As you answer the question, assume that any allocated memory consumes physical pages in RAM; that is, there is no swapping or demand paging. Note that it may be helpful for you to draw pictures (but you don’t have to).

As a reminder, the x86-64 imposes a multi-level page table structure: pages are 4KB, each page table entry is 8 bytes, and each individual page table (a node in the “tree”) occupies one page. Thus, each page table holds 4 KB / 8 B = 512 = 29 entries. Recall that the structure is four levels; each level is indexed by 9 bits of the virtual address.

  • What is the minimum number of physical pages consumed by a process that allocates 12KB (for example, 1 page each for code, stack, and data)?

  • What is the minimum number of physical pages consumed by a process that makes 29 + 1 allocations of size 4KB each? You can leave your answer in terms of powers of 2, and sums thereof.

  • What is the minimum number of physical pages consumed by a process that makes 218 + 1 allocations of size 4KB each? You can leave your answer in terms of powers of 2, and sums thereof.

Virtual memory fundamentals

Consider a (huge) machine that has 60-bit virtual addresses, a page size of 1 terabyte (1 TB, or 240 bytes), and 52-bit physical addresses.

  1. How many bits is the VPN (virtual page number)?
  2. How many bits is the PPN (physical page number)?
  3. How many bits is the offset?

Page faults and permissions

For the statements below, please state whether they are true Always, Sometimes, or Never. Justify each answer.

  1. "On the x86, if a given memory reference (load or store) causes a page fault exception, then that memory reference also causes a TLB miss."
  2. "On the x86, if a given memory reference from user mode results in a TLB miss, then the memory reference also causes a page fault."
  3. "On the x86, if a given memory reference from kernel mode results in a TLB miss, then the memory reference also causes a page fault."
  4. "On the x86, if a page table entry's PTE_P and PTE_U bits are set, then it is permissible for the process to load from a virtual address in the corresponding virtual page."
  5. "On the x86, if a page table entry's PTE_P and PTE_U bits are set, then it is permissible for the process to store to a virtual address in the corresponding virtual page."