WeensyOS
Begin Weensy OS:
Read the lab 4 description. Seriously, read it. (As opposed to skimming it.)
Fetch and build the code.
Now answer:
Where in physical memory—which pages or addresses—does the kernel’s code and data live? Give the range in hex. (Hint: you do not need to look at the code; you can simply
make run
ormake run-console
and read it off the graphical memory maps.)What physical address does the kernel’s stack live on?
Same two question as above, for virtual memory: what are the virtual addresses of the kernel’s code and data, and at what virtual address does the kernel’s stack live in virtual memory?
Use the constants and macros given in the assignment (in the sections “Memory system layout” and “Writing expressions for addresses”) to write an expression for the number of physical pages in memory. This will be handy to have as you begin coding the lab.
Page faults and permissions
For the statements below, please state whether they are true Always, Sometimes, or Never. Justify each answer.
- "On the x86, if a given memory reference (load or store) causes a page fault exception, then that memory reference also causes a TLB miss."
- "On the x86, if a given memory reference from user mode results in a TLB miss, then the memory reference also causes a page fault."
- "On the x86, if a given memory reference from kernel mode results in a TLB miss, then the memory reference also causes a page fault."
- "On the x86, if a page table entry's
PTE_P
andPTE_U
bits are set, then it is permissible for the process to load from a virtual address in the corresponding virtual page." - "On the x86, if a page table entry's
PTE_P
andPTE_U
bits are set, then it is permissible for the process to store to a virtual address in the corresponding virtual page."
TLB, page faults
Assume that the assembly code below is executed after a context switch. Make the following additional assumptions:
- The TLB is flushed (emptied) after context switch.
- Suppose all data pages (in the example below: 0x200000, 0x300000) are stored on disk when instruction 0x500 is executing.
- There is no prefetching.
[context switch]
0x500 movq 0x200000, %rax # move data in address 0x200000 to register %rax
0x504 incq %rax, 1 # add one to %rax
0x508 movq %rax, 0x300000 # move register %rax to memory at address 0x300000
Answer the following questions:
- How many TLB misses will happen, and for which pages?
- How many page faults will happen, and for which pages?
Uses of page faults
In this problem, you will describe how the implementation of malloc() can exploit paging so that the system (as a whole) can detect certain kinds of out of bound accesses; an out of bound access is when a process references memory that is outside an allocated range. In this problem we focus on overruns. Consider this code:
int *a = malloc(sizeof(int) * 100); /* allocates space for 100 ints */
a[0] = 5; /* This is a legal memory reference */
a[99] = 5; /* This is also a legal memory reference */
a[100] = 6; /* This is an overrun, and is an illegal memory reference. */
When the above executes, the process would ideally page fault as a result of an illegal memory reference, at which point the kernel would end the process.
Assume that malloc()
is a system call, so its implementation is inside the operating system, and thus can manipulate the virtual address space of the process.
Describe how the implementation of malloc()
can arrange for page faults when there are overruns like the one above.
Handing in the homework
Use Gradescope; you can enroll in our course with entry code 4J462V.