Operating Systems

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1.2 History of Operating Systems

  1. Single user (no OS).

  2. Batch, uniprogrammed, run to completion.
  3. Multiprogrammed
  4. Personal Computers

Homework: 3.

1.3: OS Zoo

There is not as much difference between mainframe, server, multiprocessor, and PC OSes as Tannenbaum suggests. For example Windows NT/2000/XP are used in all (except mainframes) and Unix and Linux are used on all.

1.3.1: Mainframe Operating Systems

Used in data centers, these systems ofter tremendous I/O capabilities and extensive fault tolerance.

1.3.2: Server Operating Systems

Perhaps the most important servers today are web servers. Again I/O (and network) performance are critical.

1.3.3: Multiprocessor Operating systems

These existed almost from the beginning of the computer age, but now are not exotic.

1.3.4: PC Operating Systems (client machines)

Some OSes (e.g. Windows ME) are tailored for this application. One could also say they are restricted to this application.

1.3.5: Real-time Operating Systems

1.3.6: Embedded Operating Systems

1.3.7: Smart Card Operating Systems

Very limited in power (both meanings of the word).

Multiple computers

Homework: 5.

1.4: Computer Hardware Review

Tannenbaum's treatment is very brief and superficial. Mine is even more so. The picture on the right is very simplified. For one thing, today separate buses are used to Memory and Video.

1.4.1: Processors

We will ignore processor concepts such as program counters and stack pointers. We will also ignore computer design issues such as pipelining and superscalar. We do, however, need the notion of a trap, that is an instruction that atomically switches the processor into privileged mode and jumps to a pre-defined physical address.

1.4.2: Memory

We will ignore caches, but will (later) discuss demand paging, which is very similar although uses completely disjoint terminology. In both cases, the goal is to combine large slow memory with small fast memory and achieve the effect of large fast memory.

The central memory in a system is called RAM (Random Access Memory). A key point is that it is volatile, i.e. the memory loses its value if power is turned off.

Disk Hardware

I don't understand why Tanenbaum discusses disks here instead of in the next section entitled I/O devices, but he does. I don't.

ROM / PROM / EPROM / EEPROM / Flash Ram

ROM (Read Only Memory) is used to hold data that will not change, e.g. the serial number of a computer or the program use in a microwave. ROM is non-volatile.

But often this unchangable data needs to be changed (e.g., to fix bugs). This gives rise first to PROM (Programmable ROM), which, like a CD-R, can be written once (as opposed to being mass produced already written like a CD-ROM), and then to EPROM (Erasable PROM; not Erasable ROM as in Tanenbaum), which is like a CD-RW. An EPROM is especially. convenient if it can be erased with a normal circuit (EEPROM, Electrically EPROM or Flash RAM).

Memory Protection and Context Switching

As mentioned above when discussing OS/MFT and OS/MVT multiprogramming requires that we protect one process from another. That is we need to translate the virtual addresses of each program into distinct physical addresses. The hardware that performs this translation is called the MMU or Memory Management Unit.

When context switching from one process to another, the translation must change, which can be an expensive operation.

1.4.3: I/O Devices

When we do I/O for real, I will show a real disk opened up and illustrate the components

Devices are often quite complicated to manage and a separate computer, called a controller, is used to translate simple commands (read sector 123456) into what the device requires (read cylinder 321, head 6, sector 765). Actually the controller does considerably more, e.g. calculates a checksum for error detection.

How does the OS know when the I/O is complete?

  1. It can busy wait constantly asking the controller if the I/O is complete. This is the easiest (by far) but has low performance. It is also called polling or PIO (Programmed I/O).
  2. It can tell the controller to start the I/O and then switch to other tasks. The controller must then interrupt the OS when the I/O is done. Less waiting, but harder (concurrency!).
  3. Some controllers can do DMA (Direct Memory Access) in which case they deal directly with memory after being started by the CPU. This takes work from the CPU and halves the number of bus accesses.
We discuss this more in chapter 5. In particular, we explain the last point about halving bus accesses there.



1.4.4: Buses

I don't care very much about the names of the buses, but the diagram given in the book doesn't show a modern design. The one below does. On the right is a figure showing the specifications for a modern chip set (introduced in 2000). The chip set has two different width PCI busses, which is not shown below. Instead of having the chip set supply USB, a PCI USB controller may be used. Finally, the use of ISA is decreasing. Indeed my newest machine does not have a ISA bus and I had to replace my ISA sound card with a PCI version.