Simulating Combinatorial Circuits at the Gate Level

The idea is, given a circuit diagram, write a program that behaves the way the circuit does. This means more than getting the same answer. The program is to work the way the circuit does.

For each logic box, you write a procedure with the following properties.

• A parameters is defined for each input and output wire.
• A (local) variable is defined for each internal wire.
  Really means a variable define for each signal. If a signal is sent from one gate to say 3 others, you might not call all those connections one wire, but it is one signal and is represented by one variable
• The only operations used are AND OR XOR NOT
  • In the C language & | ^ ~ (do NOT use !
  • Other languages similar.
  • Best is a language with variables and constants of type Boolean.
• An assignment statement (with an operator) corresponds to a gate.
  For example A = B & C; would mean that there is an AND gate with input wires B and C and output wire A.
• NO conditional assignment.
• NO if then else statements.
  Implement a mux using ANDs, ORs, and NOTs.
• Single assignment to each variable.
  Multiple assignments would correspond to a cycle or to two outputs connected to the same wire.
• A bus (i.e., a set of signals) is represented by an array.
• Testing
  • Exhaustive possible for 1-bit cases
  • Cleverness for n-bit cases (n=32, say)

Simulating a Full Adder

Remember that a full adder has three inputs and two outputs. Hand out hard copies of FullAdder.c.

Simulating a 4-bit Adder

This implementation uses the full adder code above. Hand out hard copies of FourBitAdder.c.

Lab 1: Simulating A 1-bit ALU

Hand out Lab 1, which is available in text (without the diagram), pdf, and postscript.

3.4 Representing instructions in the Computer (MIPS)

Register file

• We just learned how to build this
• 32 Registers each 32 bits
• Register 0 is always 0 when read and stores to register 0 are ignored

Homework: 3.2

The fields of a MIPS instruction are quite consistent

    op    rs    rt    rd    shamt  funct   <-- name of field
    6     5     5     5      5      6      <-- number of bits

• op is the opcode
• rs,rt are source operands
• rd is destination
• shamt is the shift amount
• funct is used for op=0 to distinguish alu ops
  • alu is arithmetic and logic unit
  • add/sub/and/or/not etc.
• We will see there are other formats (but similar to this one).

R-type instruction (R for register)

Example: add $1,$2,$3

• R-type use the format above
• The example given has for its 6 fields 0--2--3--1--0--32
• op=0, alu op
• funct=21 specifies add
• reg1 <-- reg2 + reg3
• The regs can all be the same (doubles the value in the reg).
• Do sub by just changing the funct
• If the regs are the same for subtract, the instruction clears the register.

I-type (why I?)

    op    rs    rt   address
    6     5     5     16

• rs is a source reg.
• rt is the destination reg.

Examples: lw/sw $1,1000($2)

• $1 <-- Mem[$2+1000]
  $1 --> Mem[$2+1000]
• Transfers to/from memory, normally in words (32-bits)
  • But the machine is byte addressable!
  • Then how come have load/store word instead of byte?
  • Ans: It has load/store byte as well, but we don't cover it.
  • What if the address is not a multiple of 4:
  • Ans: An error (MIPS requires aligned accesses).
• machine format is: 35/43 $2 $1 1000

RISC-like properties of the MIPS architecture.

• All instructions are the same length (32 bits).
• Field sizes of R-type and I-type correspond.
• The type (R-type, I-type, etc.) is determined by the opcode.
• rs is the reference to memory for both load and store.
• These properties will prove helpful when we construct a MIPS processor.

Branching instruction

slt (set less-then)

• R-type
• reg3 <-- (if reg8 < reg2 then 1 else 0)
• Like other R-types: read 2nd and 3rd reg, write 1st

beq and bne (branch (not) equal)

• I-type
• if reg1=reg2 then go to the 124rd instruction after this one.
• if reg1!=reg2 then go to the 124rd instruction after this one.
• Why 124 not 123? Ans: We will see that the CPU adds 4 to the program counter (for the no branch case) and then adds (4 times) the third operand.
• Normally one writes a label for the third operand and the assembler calculates the offset needed.