• Due in two weeks

lui (load upper immediate)

• How can we get a 32-bit constant into reg since we can't have a 32 bit immediate?
  1. Load the word
     • Have the constant placed in the program text (via some assembler directive).
     • Issue lw to load the register
     • But memory accesses are slow and this uses a cache entry
  2. Load shift add
     1. Load immediate the high order 16 bits (into the low order of the register).
     2. Shift the register left 16 bits (filling low order with zero)
     3. Add immediate the low order 16 bits
     4. Three instructions, three words of memory
  3. load-upper add
     • Use lui to load immediate the high order 16 bits into the high order bits and clear the low order
     • Add immediate the low order 16 bits.
     • lui $4,123 -- puts 123 into top half of reg4
       addi $4,$4,456 -- puts 456 into bottom half of reg4
       

Homework: 3.1, 3.3-3.7, 3.9, 3.18, 3.37 (for fun)

Chapter 4

Homework: 4.1-4.9

4.2: Signed and Unsigned Numbers

MIPS uses 2s complement (just like 8086)

To form the 2s complement (of 0000 1111 0000 1010 0000 0000 1111 1100)

• take the 1s complement
• That is complement each bit (1111 0000 1111 0101 1111 1111 0000 0011)
• Then add 1 (1111 0000 1111 0101 1111 1111 0000 0100)

Need comparisons for signed and unsigned.

• For signed a leading 1 is smaller (negative) than a leading 0
• For unsigned a leading 1 is larger than a leading 0

sltu and sltiu

Just like slt and slti but the comparison is unsigned.

4.3: Addition and subtraction

To add two (signed) numbers just add them. That is don't treat the sign bit special.

To subtract A-B, just take the 2s complement of B and add.

Overflows

An overflow occurs when the result of an operatoin cannot be represented with the available hardware. For MIPS this means when the result does not fit in a 32-bit word.

• We have 31 bits plus a sign bit.
• The result would definitely fit in 33 bits (32 plus sign)
• The hardware simply discards the carry out of the top (sign) bit
• This is not wrong--consider -1 + -1

    11111111111111111111111111111111   (32 ones is -1)
  + 11111111111111111111111111111111
  ----------------------------------
   111111111111111111111111111111110   Now discard the carry out
  
    11111111111111111111111111111110   this is -2
  

• The bottom 31 bits are always correct.
  Overflow occurs when the 32 (sign) bit is set to a value and not the sign.
• Here are the conditions for overflow

  Operation  Operand A  Operand B  Result
     A+B       >= 0        >= 0      < 0
     A+B        < 0         < 0     >= 0
     A-B       >= 0         < 0      < 0
     A-B        < 0        >= 0     >= 0
  

• These conditions are the same as
  CarryIn to sign position != CarryOut