Do beginning of this HW on the board. With DM we can do quite a bit without resorting to TTs. For example one can show that the two expressions for E on example above (page B-6) are equal. Indeed that is HOMEWORK B.7 on page B-45 Do beginning of HW on board. GATES gates implement basic logic functions: AND OR NOT XOR Equivalance Show pictures (Fig B) Show why the picture is equivalence, i.e (A XOR B)_ is AB + A'B' (Fig C) Often omit the inverters and draw the little circles at the input or output of the other gates (AND OR). These little circles are sometimes called bubbles. Explain picture bottom of B-7 (Fig D) This explains how inverter is buffer with a bubble. HOMEWORK B.2 on page B-45 (I previously did the first part of this homework). HOMEWORK Consider the Boolean function of 3 boolean vars (i.e. a three input function) that is true if and only if exactly 1 of the three variables is true. Draw the TT. Draw the logic diagram with AND OR NOT. Draw the logic diagram with AND OR and bubbles. We have seen that any logic function can be constructed from AND OR NOT. So this triple is called universal. Are there any pairs that are universal. Could it be that there is a single function that is universal? YES! NOR (not OR) is true when OR is false. Do TT. NAND (not AND) is true when AND is false. Do TT. Draw both diagrams (one from def and equivalent one) with bubbles. A 2-input NOR is universal. A 2-input NAND is universal. Show on board that a 2-input NOR is universal. A_ = A NOR A A+B = (A NOR B)_ AB = (A_ OR B_)_ HOMEWORK Show that a 2-input NAND is universal. Notes 1. Can draw NAND and NOR each two ways (because (AB)_ = A_ + B_) 2. We have seen how to get a logic function from a TT. Indeed we can get one that is just two levels of logic. But it might not be the simplist possible. That is we may have more gates than necessary. Trying to minimize the number of gates is NOT trivial. Mano covers this in detail. We will not cover it in this course. It is not in H&P. I actually like it but must admit that it takes a few lectures to cover well and it not used so much since it is algorithmic and is done automatically by CAD tools. 3. Example of non-unique minimization Given A_BC + ABC + ABC_. Combine first two to get BC + ABC_ Combine last two to get A_BC + AB 4. Can have "don't care" results. Helps minimization. COMBINATIONAL LOGIC Multiplexor Called Mux Also called selector Two different diagrams (fig E) Show equiv circuit with AND OR if S=0 M=A else M=B endif Can have 4 way mux (2 selector lines) if S1=0 and S2=0 M=A else if ... M=B ... else M=D Do TT for 2 way mux. Redo it with don't care values HOMEWORK B-12 Assume you have constant signals 1 and 0 as well. Decoder Takes n signals in produces 2^n signals out Input "binary n" Output has n'th bit set Picture is fig F (note the "by 3" symbol) Implement on board with AND/OR Encoder Reverse "function" of encoder Not defined for all inputs (exactly one must be 1)