### Assignment 2: Combinational Circuit -- Comparator

In this assignment, you are to design an 8-bit comparator for unsigned binary numbers and verify the design by simulating it using a popular procedural language such as C, Pascal, or Java. You may use inverters and two and three-input AND, NAND, OR, NOR, exclusive-OR and exclusive-NOR ("equivalence") gates. (A gate with an inverted input line should be treated as two separate gates:  the inverter and the gate.)

The input of an n-bit binary comparator is two n-bit numbers: An-1 ... A0 and Bn-1 ... B0.  There are three outputs, labeled A<B, A=B, and A>B;  for any input, exactly one of these should =1.

Design suggestion:  in analogy with the ripple-carry adder, you can design a 1-bit comparator and then hook these up to form a "ripple comparator".  The 1-bit comparator would have five inputs;  two of these inputs would be the data bits, Ai and Bi.  The other three inputs, A<Bin, A=Bin, and A>Bin, would get information from the comparator to its left, indicating the relationship between the bits to the left (between An-1 ... Ai+1 and Bn-1 ... Bi+1).  The three outputs, A<Bout, A=Bout, and A>Bout, would represent the relation between An-1 ... Ai and Bn-1 ... Bi.   Note that, in contrast to the ripple carry adder, here the information ripples from left to right.

#### What to Submit:

1. A design for the circuit, starting from the basic logic gates listed above. Don't draw one big circuit --- if you use a ripple comparator, show the structure of a 1-bit comparator, and then (as a separate picture) show how the 1-bit comparators would be connected together.  This emphasizes the structure of the design and means you have much less to draw.
2. Determine the propagation delay of the circuit as a multiple of the propagation delay of an individual gate.
3. Create a simulation of the circuit using a program. Use the same hierarchical approach you used in designing the circuit. Submit a listing of this program.
4. Write a program to test this circuit. Submit a listing of this program, and the test output. Can you exhaustively test this circuit?
All this should be bundled together and submitted by noon on February 17. Late assignments are penalized 5% after noon, and 10% for each weekday late.

#### Extra Credit

• How would you modify the circuit to compare two's complement signed numbers?
• How would you modify the circuit to be faster, particularly for large n?

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Spring 1999