### Lecture 3: Logic Design -- Sequential Circuits

Text: Appendix B.4 to 7

#### Combinational vs. sequential circuits

• in a combinational circuit, output (after some delay) is a function of inputs
• in contrast, a sequential circuit holds state information: the output is a function of the state of the device, as well as its inputs; in other words, sequential circuits have memory

#### Simple latches

• RS latch (reset-set latch): set and reset inputs (text, figure B.12)
• D-type latch: clock and data inputs (text, figure B.13): use of clock to control when a latch is updated
• register: set of latches with a common clock

#### Synchronous circuits

• consists of a set of registers controlled by a common clock, along with a combinatorial circuit to compute the next state (text, figures B.10, B.11, B.27)
• up-counter as simple example of synchronous circuit
• race problem if same latches are used for input to and output from combinatorial circuit (figure B.11)

• use of edge-triggered registers to address race problem

#### Master-slave flip-flops

• provide an way of implementing edge-triggered FFs
• built from two simple flip-flops (latches) with complementary clocks

• (text, figure B.15, page B-24)
• changes output on falling edge

#### Timing for synchronous circuits

• basic requirement: delay of combinational circuit to compute next state < clock period (text, figure B.30, page B-40)

#### Register files (text, pages B-25 to B-27)

• a register file is an array of registers
• the register to be read/written is selected by the "register number" input
• decoders are used to control writes
• multiplexers are used to select data to be read
• a file may have multiple read ports (text, figures B.18 - B.20)
Spring 2002