### Lecture 3: Logic Design -- Combinational Circuits: canonical forms and propagation delay

Text: Appendix B.3

#### Canonical forms and PLAs

• sum-of-products representation
• universality of this representation (as shown by conversion from truth table)
• reflected in PLAs (programmable logic arrays) as universal logic elements

#### How many types of gates do we need?

• sum of products form means AND, OR, and NOT gates together are sufficient
• can build AND from OR and NOT, or OR from AND and NOT (DeMorgan's theorems), so two gate types (AND + NOT, or OR + NOT) are sufficient
• can we build everything from just one (universal) gate type? (your challenge in Assignment 1)

#### Propagation delay (note: not covered in text)

• delay of individual transistor -- how fast it can switch -- determined by physical factors (e.g., size); now below 1 ns
• speed of transistor determines speed of gate
• the propagation delay (speed) of a combinatorial circuit is the length of time from the moment when all input signals are stable until the moment when all outputs have stabilized
• propagation delay of a combinatorial circuit can be determined as longest path (in number of gates) from any input to any output