Computer Architecture

Start Lecture #19

Homework: Carefully go through and understand the example on page 247 that I just did in class.

Homework: The next 5 problems form a set, i.e., the data from one applies to all the following problems. The first three, 4.1, 4.2, and 4.3, are from the book.

Homework: If the clock rates of the machines M1 and M2 from exercise 4.1 are 1GHz and 2GHz, respectively, find the CPI for program 1 on both machines.

Homework: Assume the CPI for program 2 on each machine is the same as the CPI for program 1 you calculated in the previous problem. What is the instruction count for program 2 on each machine

4.3: Evaluating Performance

I have nothing to add.

4.4: Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors


4.5 Fallacies and Pitfalls

What is the MIPS rating for a computer and how useful is it?

Homework: Carefully go through and understand the example on pages 248-249

How about MFLOPS (Million of FLoating point OPerations per Second)? For numerical calculations floating point operations are the ones you are interested in; the others are overhead (a very rough approximation to reality).

It has similar problems to MIPS.

Benchmarks are better than MIPS or MFLOPS, but still have difficulties.

4.6: Concluding Remarks

Homework: Read this (very short) section.

Chapter 7: Memory

Homework: Read Chapter 7.

7.1: Introduction

An ideal memory is

Unable to achieve the impossible ideal we use a memory hierarchy consisting of

  1. Registers
  2. Cache (really L1, L2, and maybe L3)
  3. (Central or Main) Memory
  4. Disk
  5. Archive (e.g. Tape)

... and try to satisfy most references in the small fast memories near the top of the hierarchy.

There is a capacity/performance/price gap between each pair of adjacent levels. We will study the cache-to-memory gap.

We observe empirically (and teach in OS).

A cache is a small fast memory between the processor and the main memory. It contains a subset of the contents of the main memory.

A Cache is organized in units of blocks. Common block sizes are 16, 32, and 64 bytes.

This is the smallest unit we can move to/from a cache (some designs move subblocks, but we will not discuss them).

A hit occurs when a memory reference is found in the upper level of the memory hierarchy.