Computer Architecture

Start Lecture #11

Chapter 3

Homework: Read 3.1-3-4

3.1: Introduction

I have nothing to add.

3.2: Signed and Unsigned Numbers

MIPS uses 2s complement (just like 8086)

To form the 2s complement (of 0000 1111 0000 1010 0000 0000 1111 1100)

Need comparisons for signed and unsigned.

Comments on Two's Complement

You could easily ask what does this funny notation have to do with negative numbers. Let me make a few comments.

  1. What does minus 1 mean?
    Ans: It is the unique number that, when added to 1, gives zero.
  2. The binary number 1111...1111 has this property (using regular n-bit addition and discarding the carry-out) so we do seem to have -1 correct.
  3. Just as n+1 (for n≥0) is defined as the successor of n, -(n+1) is the number that has -n as successor. That is we need to show that
    TwosComp(n+1) + 1 = TwosComp(n).
  4. This would follow if we coud show
    OnesComp(n+1) + 1 = OnesComp(n), i.e, (n+1)' + 1 = n'.
    1. Let n be even, n = *0, * arbitrary.
    2. Write n', n+1 and (n+1)' and see that it works.
    3. Let n be odd, n = *01s1, where 1s just means a bunch of ones.
    4. Again it works.
  5. So for example TwosComp(6)+1=TwosComp(5) and hence TwosComp(6)+6=zero, so it really is -6.

sltu and sltiu

Like slt and slti but the comparison is unsigned.

Homework: 3.1-3.6

3.3: Addition and subtraction

To add two (signed) numbers just add them. That is, don't treat the sign bit special.

To subtract A-B, just take the 2s complement of B and add.


An overflow occurs when the result of an operation cannot be represented with the available hardware. For MIPS this means when the result does not fit in a 32-bit word.

Homework: Prove this last statement (4.29) (for fun only, do not hand in).

addu, subu, addiu

These three instructions perform addition and subtraction the same way as do add and sub, but do not signal overflow.



This is a sequential circuit.

Homework: A 4-bit shift register initially contains 1101. It is shifted six times to the right with the serial input being 101101. What is the contents of the register after each shift.

Homework: Same register, same initial condition. For the first 6 cycles the opcodes are left, left, right, nop, left, right and the serial input is 101101. The next cycle the register is loaded (in parallel) with 1011. The final 6 cycles are the same as the first 6. What is the contents of the register after each cycle?

3.4: Multiplication

Of course we can do this with two levels of logic since multiplication is just a function of its inputs.

But just as with addition, would have a very big circuit and large fan in. Instead we use a sequential circuit that mimics the algorithm we all learned in grade school.

Recall how to do multiplication.

We will do it the same way ...
... but differently

This results in the following algorithm

    product ← 0
    for i = 0 to 31
        if LOB of multiplier = 1
            product = product + multiplicand
        shift multiplicand left 1 bit
        shift multiplier right 1 bit

Do on the board 4-bit multiplication (8-bit registers) 1100 x 1101. Since the result has (up to) 8 bits, this is often called a 4x4→8 multiply.

The First Attempt

The diagrams below are for a 32x32-->64 multiplier.

What about the control?

This works!

But, when compared to the better solutions to come, is wasteful of resourses and hence is

An Improved Circuit

The product register must be 64 bits since the product can contain 64 bits.

Why is multiplicand register 64 bits?

Why is ALU 64-bits?

POOF!! ... as the smoke clears we see an idea.

We can solve both problems at once

This results in the following algorithm

    product <- 0
    for i = 0 to 31
        if LOB of multiplier = 1
            (serial_in, product[32-63]) <- product[32-63] + multiplicand
        shift product right 1 bit
        shift multiplier right 1 bit

What about control

Redo same example on board

A final trick (gate bumming, like code bumming of 60s)

The algorithm changes to:

    product[0-31] <- multiplier
    for i = 0 to 31
      if LOB of product = 1
        (serial_in, product[32-63]) <- product[32-63] + multiplicand
      shift product right 1 bit

Control again boring.

Redo the same example on the board.

Signed Multiplication

The above was for unsigned 32-bit multiplication. What about signed multiplication?

There are faster multipliers, but we are not covering them.

3.5: Division

We are skiping division.

3.6: Floating Point

We are skiping floating point.

3.7: Real Stuff: Floating Point in the IA-32

We are skiping floating point.

Homework: Read for your pleasure (not on exams) 3.8 Fallacies and Pitfalls, 3.9 Conclusion, and 3.10 ``Historical Perspective'' (the last is on the CD).