V22.0436  Prof. Grishman
Lecture 6: Logic Design  FlipFlops and Synchronous Circuits
(simple latches  lecture 5 notes)
Synchronous circuits

consists of a set of registers controlled by a common clock, along with
a combinatorial circuit to compute the next state (text, figures B.10,
B.11, B.27)

upcounter as simple example of synchronous circuit

race problem if same latches are used for input to and output from combinatorial
circuit (figure B.11)
use of edgetriggered registers to address race problem
Masterslave flipflops

provide an way of implementing edgetriggered FFs

built from two simple flipflops (latches) with complementary clocks
(text, figure B.15, page B24)

changes output on falling edge
Timing for synchronous circuits

basic requirement: delay of combinational circuit to compute next state
< clock period (text, figure B.30, page B40)
Spring 1999