V22.0436 - Prof. Grishman
Lecture 27: Input-Output: Real Busses
PC Expansion Busses
Gradual trend toward increased speed through wider data paths
(clock speed is limited by backward compatibility to 8.33 MHz).
- PC/XT bus: 8 bits
- AT (ISA) bus: 16 bits; max 8.33 MB/sec
- EISA bus: 32 bits and burst transmission permit up to 33 MB/sec
Integrated controllers and SCSI
- IDE (intelligence drive electronics): integrates disk controller
with disk; interface is roughly AT bus interface, limited to 8.33 MB/sec
- EIDE (extended IDE), allows up to 16.6 MB/sec
- SCSI (small computer systems interface) also uses intelligent integrated
- rich, standardized command structure
- platform independent (IBM, Mac, Sun, ...)
- basic SCSI speed (8 bit data bus) is 4 MB/sec asynchronous, 5 MB/sec
- fast SCSI supports up to 10 MB/sec synchronous
- wide SCSI, 16 or 32 bit data, up to 20 or 40 MB / sec.
Hierarchy of busses
Modern PCs use multiple busses: the fastest connecting processor and memory,
intermediate speed for display and network, slower for most peripherals
PCI (peripheral component interconnect) architecture: CPU and memory
connected directly, and connected through PCI "bridge" to PCI bus.
PCI bus directly connected to fastest devices (graphics, fast LAN) and
through adapters to slower busses (SCSI, ISA / EISA). Maximum PCI speed
is 133 MB/sec at 32 bit data path width (33 MHz clock).
To estimate the performance of a computer system with fast
IO devices, we must examine each link in the data transmission
chain: the device itself, the bus (or busses), and the memory.
Performance issues are discussed in the text, section 8.5; see
also exercises 8.10 - 8.13.