V22.0436 - Prof. Grishman

Lecture 27: Input-Output: Real Busses

Real Busses

PC Expansion Busses

Gradual trend toward increased speed through wider data paths (clock speed is limited by backward compatibility to 8.33 MHz).

Integrated controllers and SCSI

Hierarchy of busses

Modern PCs use multiple busses: the fastest connecting processor and memory, intermediate speed for display and network, slower for most peripherals

PCI (peripheral component interconnect) architecture: CPU and memory connected directly, and connected through PCI "bridge" to PCI bus. PCI bus directly connected to fastest devices (graphics, fast LAN) and through adapters to slower busses (SCSI, ISA / EISA). Maximum PCI speed is 133 MB/sec at 32 bit data path width (33 MHz clock).

Performance analysis

To estimate the performance of a computer system with fast IO devices, we must examine each link in the data transmission chain: the device itself, the bus (or busses), and the memory. Performance issues are discussed in the text, section 8.5; see also exercises 8.10 - 8.13.