In this assignment, you are to design a two-digit decimal adder, using a binary-coded-decimal representation, and verify the design by simulating it using a popular procedural language such as C or Pascal.

In a binary-coded-decimal (BCD) representation, each decimal digit is represented by four signals, D[0], D[1], D[2], and D[3]. These are interpreted as a binary number, with D[0] being the least significant digit, so that the digit 5 is represented by D[3]=0, D[2]=1, D[1]=0, and D[0]=1. Bit combinations representing values of ten or greater are not valid BCD patterns.

A two-digit decimal number is represented by two sets of four signals: ONES and TENS. A two-digit decimal adder takes two decimal numbers: A-ONES and A-TENS, and B-ONES and B-TENS (16 bits of input in total); it produces a two-digit sum, SUM-ONES and SUM-TENS, and a single CARRY-OUT bit (9 bits total).

The tricky part is to create a decimal adder circuit for a single decimal digit. You can create a circuit directly from the truth table, but there are more straightforward ways. Specifically, you can perform decimal addition of inputs A and B in three steps:

- add A and B in a 4-bit binary adder, producing a binary sum BSUM and carry-out COUT1
- generate a correction CORR as follows: if BSUM>9, CORR=6
else CORR=0 (remember, you have to do this with a Boolean circuit!);
this value will be used to
*correct*digits which are greater than 9 - use a second 4-bit binary adder to add BSUM and CORR, producing SUM and a second carry-out COUT2

Finally, you have to produce a carry-out from the decimal digit.

- A design for the circuit, starting from basic logic gates. Don't draw one big circuit --- show the design at several levels. First, create a full-adder from gates; then, a 4-bit adder from full adders; then, a one-digit decimal adder from 4-bit adders and individual gates; finally, a two-digit decimal adder from one-digit adders. This emphasizes the structure of the design and means you have much less to draw.
- Determine the propagation delay of the circuit as a multiple of the propagation delay of an individual gate.
- Create a simulation of the circuit using a program. Use the same hierarchical approach you used in designing the circuit. Submit a listing of this program.
- Write a program to test this circuit. Submit a listing of this program, and the test output. Can you exhaustively test this circuit?

All this should be bundled together and submitted not later than
* September 29*. Late assignments are penalized 10%
for each weekday late.