CSCI-UA.0436 - Computer Architecture - Fall 2012 - Prof. Grishman

Course Schedule
links will be filled in as lectures are presented
Class Date Topic Text Assignment
(date assigned)
1 Sept. 5
Intro; time & frequency; history
Chap. 1


Logic Design Appendix C

2 Sept. 10
Gates and circuits;  canonical form
C.2, C.3

3 Sept. 12
Simulation;  propagation delay

#1 (gates / universality)
4 Sept. 17
Sequential circuits
C.7, C.8
5 Sept. 19
FFs; synchronous circuits and memory elements
example: counter [Logisim circuit]
C.9; C.10 #2 (adder)
6 Sept. 24
Memories; intro to MIPS
C.9


MIPS and its ALU
Chap. 2

7
Sept. 26 MIPS instruction set (in-class programs)
Chap. 2
#3 (register file)
8 Oct. 1
MIPS instructions (in-class program) and MIPS ALU;
carry look-ahead
Chap. 2; C.5; C.6

9 Oct. 3
arithmetic Chap. 3*
#4 (MIPS program)
10 Oct. 8
review for mid-term


11
Oct.10
Mid-term



Processor Design Chap. 4
12 Oct. 17
(go over mid-term) Building a data path 4.1 - 4.3
#5 (ALU)
13 Oct. 22
Data paths/single cycle control
4.3, 4.4

14 Oct. 24
Single cycle control 4.4


Oct. 29

Great storm of '12 ... no class



Oct. 31



Nov. 5


15 Nov. 7
Measuring Performance
1.4, 1.7
#6 (control unit)
16 Nov. 12
Pipelining
4.6*, 4.7*, 4.8*

17 Nov. 14
Multiple instruction issue
4.10
#7 (CPU)
18 Nov. 19
Processor limits and multithreading
7.1-7.3, 7.5


Memory
Chap. 5

19
Nov. 21
Memory Technology and Introduction to Cache 5.1
20 Nov. 26 Cache organization 5.2
21 Nov. 28
Cache:  blocks, writes, performance 5.3 #8 (cache)


Input-output
Chap. 6

22 Dec. 3
types of devices 6.1 - 6.4

23 Dec. 5
buses and I/O transfer 6.5 - 6.6



Parallelism
Chap. 7

24 Dec. 10
Multiprocessors
7.1 - 7.5

25
Dec. 12
review for final exam

* partial coverage
 
Final Exam: December 17, 2:00 pm - 3:50 pm, 201 Warren Weaver