CSCI-UA.0436 - Prof. Grishman
Note: the italicized comments indicate the main topics to be
on the exam, but are not exhaustive. Any topic covered in the
about combinational and sequential circuits is
fair game on the exam.
The mid-term is closed book. However, students may
bring a single sheet of notes (letter, legal, or A4, written on
both sides, with your name on the sheet) to the exam.
Time and Frequency
You should know the units of time and frequency, and be able to
- What is the clock period for a 200 Hz clock? For a 200
You should be able to design a circuit (and compute its
delay), given a verbal or truth-table description of the circuit.
be familiar with the basic circuit types: and, or, nand, nor,
and not gates; multiplexer, full adder, and decoder.
- Design an exclusive-or circuit using only AND, OR, and NOT
What is the delay of this circuit if the delay of each
is 200 ps?
- Given a 3-bit input X representing a 3-bit binary number,
to test whether X is greater than or equal to 5. If this
the output of your circuit should be a 1, otherwise 0. In your
refer to the low order bit of X as X0.
- Suppose you are given a large box of 2-input multiplexers.
connect them up to create an 8-input multiplexer. If the delay
to output on the 2-input multiplexer is 10 ns, what is the delay
circuit you have designed? Suppose you had to create an N input
what would the delay be? How many 2-input multiplexers would you
You should understand the function of the basic types of
(set-reset, D type, master-slave), and the reason for using
FFs. You should be able to assemble a register file. From a
of a sequential procedure, you should be able to create a state
a state transition table, and finally a circuit.
- Go through the process of designing a two-bit down
draw the state diagram. Second, write down the state transition
Third, convert the transition table to a formula in Boolean
convert the formula to a circuit and show how it would connect
create a complete counter circuit.
- Consider a two-bit up counter with a select input S.
circuit acts as an up counter; if S=1, the counter goes to 0 on
clock cycle (reset). Give the state transition diagram and table
counter. Design the counter circuit from this table.
You should understand two's complement arithmetic and the design
adders and subtractors, including the carry-look-ahead adder, and
able to give the delay time of these circuits.
- What is the 16-bit, two's complement representation of -3?
- Suppose you are given an adder for unsigned 16-bit binary
changes must you make to the circuit to use it as an adder for
two's complement numbers?
- Given AND, OR, NOT gates and full adders, design a circuit for
doing 4-bit two's complement subtraction.
- A sum-of-products circuit has a propagation delay = 3 gate
delays. Why can't we build a 16-bit adder using
with this propagation delay?
You should be able to
simple code segments given in C or Java into MIPS assembler, and
questions about the MIPS instruction set.
- Write a sequence of MIPS instructions which put the absolute
value of $2 into $3.
- Write a MIPS instruction which will set $2 to 131,072 (= 217
= 0000 0000 0000 0010 0000 0000 0000 00002)
The mid-term is Wednesday,