Processors: Architecture & Programming
Prof. Mohamed Zahran
(aka Prof. Z)
mzahran AT cs DOT nyu DOT edu
Wednesdays 7:10-9:00 pm
Location: WWH 101
Office Hours: Weds 4-6pm (and by
appointment) WWH 320
Welcome students! ... to
the Multicore Processors: Architecture
& Programming course,
I will keep updating this page regularly. If you have
questions related to that course feel free to email me at mzahran (at) cs.nyu.edu
. Here is some basic information:
There will be no textbook
for this course. Reading
material, from research papers, will be posted on this webpage, beside
the lecture slides.
- Here is the course syllabus
We have two graders for the course:
Jyotsna Karunganni Narayanan jkn242 (at) nyu.edu
Tao He th1133 (at) nyu.edu
Sign up for the Mailman mailing
list for the course, if the system hasn't signed you already.
You can do so by clicking here.
Please follow the mailing list etiquette.
- Use the Reply command to
contribute to the current thread, but NOT to start
- If quoting a previous message, try to trim off
- Use a descriptive Subject: field when starting a new topic.
- Do not use one message to ask two unrelated questions.
- Do NOT make the mistake of sending your
completed project assignment to the mailing list!
Lectures(Numbers in the reading assignments refer to the reading material list)
Section 1.2 from #1, Section 1 from #2
Sections 2.2 and 2.3 in #1 Section 2 from#2, Section 1.2 from #3
The Memory System .. You can't Ignore it! Chp 1 from #4 and Chp 2 from #5
Know Your Hardware
Overview of Parallel Programming
3.1, 3.2, and 3.3 from #1
#1 and ( This tutorial or This tutorial ) and skim #6
OpenMP: Control vs Simplicity Tradeoff 6.3 from #1Other Concurrency Platforms
Sections 3, 4,
5, and 6 from #2
#8 and #9 Section 2.1, 2.2, 2.3, 2.4, and 2.5, #10
#12 Sections 1.3, beginning of
chp 2 till end of 2.1, and #13Putting It All Together
Below you will find the reading material we will use in this course.
Next to each lecture, above, you will find the reading
It indicates a number, corresponding to the list below, and
to read from that material. If no section numbers are indicated, it means
you need to read the whole thing.
- You must be logged into NYU network: Parallel
Programming for Multicore and Cluster Systems
- How to survive the multicore software revolution?
- Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency (You must be logged into NYU network)
- The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It (You must be logged into NYU network)
- A Primer on Memory Consistency and Cache Coherence (You must be logged into NYU network)
- The Problem With Threads
- Serialization Sets: A Dynamic Dependence-Based Parallel Execution Model
- IPC considered harmful for multiprocessor workloads
- Computer Architecture Performance Evaluation Methods (You must be logged into NYU network)
- Effective Performance Measurement and Analysis of Multithreaded Applications
- Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance
- Transactional Memory (You must be logged into NYU network)
- Unlocking Concurrency
lab1: You will need memory configuration and cpu configuration files to this lab.
If you get errors due to the lack of 32-bit libraries, you can use the following legacy 32-bit machine for compilation.
(Due Sep 26th)
Comments from our graders about Lab 1 submissions
Lab2: You will need the multicore configuration file and the memory configuration file.
(Due Oct 24th)
Comments from our graders about Lab 2 submissions
HW1 (Due Sep 19th) Sol Comments
HW2 (Due Oct 17th) Sol Comments
HW3 (Due Nov 7th) Comments
We will be using the multi2sim simulator in many of our labs and projects.
Here is a quick tutorial prepared by our grader. However, I highly encourage you
to go over the manual.
More information about each of the following milestones will be posted as we progress.
Project description report - Due Oct 10th
Literature survey and roadmap - Due Oct 31st
Design and experimental setup - Due Nov 14th
Presentations - Dec 5th
Final Report - Due Dec 12th
SCHEDULE OF PRESENTATIONS
Links (Geeky Stuff)
you have an interesting link, please email it to the instructor and it
will find its way to this page (with an acknowledgment to you of
The New Era of Inexpensive Supercomputing (Thanks to Kyle Galloway for the link)
Future Chips (targeting both software and hardware folks interested in parallel programming)
Designing and Building Parallel Programs
The touble with multicore
to parallel computing
Landscape of Parallel Computing
Building Parallel Programs
Intel Thread Building Blocks