Computer Systems Design
CSCI-GA.2233-001, Fall 2011


General Information

Lecture: Wednesday 7:10 pm - 9:00 pm, Room WWH/CIWW-201
Office Hours: Wednesday 6:15 pm - 7:00 pm Room (CIWW 328), > 9:00 pm (classroom if necessary)
Instructor: Hubertus Franke, frankeh@cs.nyu.edu
Prerequisites: G22.1170 (algorithms), proficiency in a high level programming language like C, C++, Java, some basic understanding of assembler programming.
Text book: Computer Organization and Design: The Hardware / Software Interface (4th Edition),
by David A. Patterson and John L. Hennessy
ISBN-10: 0123744938 | ISBN-13: 978-0123744937 | Publication Date: November 10, 2008 | Edition: 4

Course Description

This course gives students whose interest is in software an introduction to hardware and the logical design of digital computers. Topics include design of basic logic modules and arithmetic units; fixed and microprogrammable control structures; computer architecture; memory organization; and input-output organization. Nowadays programmers need to understand architectural features and how they can and will impact program efficiency. Examples of such features are caches, TLBs, microProcessor architecture (pipelined execution), branch prediction and multi-core design. After class completion the student should have learned the important organizational features of modern computer systems. He/she will also learned the interaction between software, compiled to assembler instrutions, and the underlying computer architecture. The text book (see below) chosen as the guide through this class has been the recognized authority on this topic. It chooses the MIPS instruction set as the basis for the low level assembler target.

Textbook

Computer Organization and Design: The Hardware / Software Interface (4th Edition),
by David A. Patterson and John L. Hennessy
ISBN-10: 0123744938 | ISBN-13: 978-0123744937 | Publication Date: November 10, 2008 | Edition: 4

Computer Accounts and Mailing List

Several labs across the semester will provide practical experience on the concepts of processor design. This will be achieved by modifying an MIPS architecture simulator.

Homework and Lab Assignments

I make a distinction between homeworks and labs. Both are required and form part of your grade.

Labs are

Homeworks are

If you have questions regarding these assignments, please ask ASAP.

Doing Labs on non-NYU Systems

You may solve lab assignments on any system you wish, but ...

Obtaining Help with the Labs

Good methods for obtaining help include

  1. Asking me during office hours (see web page for my hours).
  2. Asking the mailing list.
  3. Asking another student, but ...
    Your lab must be your own.
    That is, each student must submit a unique lab. Naturally, simply changing comments, variable names, etc. does not produce a unique lab.

Required Resources

Additional material will be made availabe here through out the class

Grades

Grades are based on the labs, the final exam, and the class participation, each being important. The weighting will be:
Homeworks and Lab Assignments 50%
Final 35%
Class Participation 15%
This is a graduate level class, so I am looking for lively interactions during the class and not just presence. The final will be given on 12/21/2011.


LecturesDateTopicHandouts ReadingsAssignments
109/07 Introduction; Fundamentals
of Computer Design
Introduction
Chapter-1
Chapter 1
HW 1
Due: 9/14
209/14 Introduction MIPS Instruction Set Chapter-2 Chapter 2
HW 2
Due: 9/21
309/21 Continuation MIPS Instruction Set Chapter-2 Chapter 2
HW 3
Due: 10/05
410/05 Continuation MIPS Instruction Set
Caches and TLBs
Chapter-2 Chapter-5 Chapters 2
Chapter 5 (Caches/TLB)
HW 4
Due: 10/12
510/10 Floating Point Operations
Chapter-3 Chapter 3
HW 5
Due: 10/26
LAB_2
Due: 10/26
610/17 Caches and TLBs
Chapter-5 Chapter 5
710/25 Caches, TLB, concurrency
Chapter-5 Chapter 5 (complete)
HW 6
Due: 11/02
811/02 Processor
Chapter-4 part1 Chapter 4 (as covered)
HW 7
Due: 11/09
911/09 Processor
Chapter-4 part2 Chapter 4 (as covered)
LAB_3
Due: 11/26
1011/16 Processor
Chapter-4 Chapter 4 (as covered)
HW 8
Due: 11/23
1111/23 I/O subsystems
Chapter-6 Chapter 6 (as covered)
HW 9
Due: 11/30
1211/23 I/O subsystems
Chapter-6 Chapter 6
1311/23 Multi-Processor Systems
Chapter-7 Chapter 7 (as covered)


See also

Graduate cs.nyu.edu courses: http://cs.nyu.edu/webapps/summer2011/courses
Graduate cs.nyu.edu schedule: http://cs.nyu.edu/webapps/summer2011/Graduate/courses
Academic integrity policy: http://cs.nyu.edu/web/Academic/Graduate/academic_integrity.html

http://cs.nyu.edu/courses/summer11/G22.2250-001/index.html