V22.0436 - Prof. Grishman
Assignment 7: MIPS Single-Cycle Processor
Using Logisim, build a complete
single-clock-cycle-per-instruction MIPS processor as described in
section 4.4 of the text.
file RegFile.zip, which
a pre-built Register File and subcircuits used by the
register file; unzip it into a folder that you create just for
put a copy of the
file (with a .circ extension) containing the ALU that you built and of
the file containing the Control circuits you built.
Run Logisim and load the libraries you need
you start Logisim, you will need to load the following libraries:
“Project>Load Library>Logisim Library…” and
specify the file “register_file.circ” in the folder into which you
in step 1.
Control: Click ““Project>Load Library>Logisim Library…” and
specify the file containing your ALU and Control circuits.
the simple single-cycle MIPS processor described in section 4.4 of the
text (Figure 4.17), using the register file provided. Use a
Logisim ROM for the instruction memory and a Logisim RAM for the data
memory (64 32-bit words for each should be sufficient). Keep in
mind that a 64-word memory needs 6 bits of address input; you
will use bits 2 through 7 of the byte address. You may
want to create additional
subcircuits, such as for the sign extension and shift 2, to keep your
main circuit manageable. The provided register file uses the
master clock of Logisim; you need to connect the
PC and data memory to the master clock.
you have built the processor, first test it on individual instructions
initializiing one word of data memory and one word of instruction
memory. Then try it on two full
programs we have provided.
Due Tuesday, November 23rd.
You should aim to have your machine working on individual instructions
by Nov. 19th, allowing the final weekend to getting it to
run on full programs.
Mail your homework to firstname.lastname@example.org
mail CompArch -- Asgn 7
the circuit files needed (including those we provided) and your test
data. These may be sent as separate attachments or a single zip
For extra credit
, modify the
processor to use a single memory which holds both programs and
data. Modify the test programs accordingly and submit them with
register_file circuit has the following external connections:
|read sel0 (5 bits)
|read data0 (32 bits)
|read sel1 (5 bits)
|write sel (5 bits)
|read data1 (32 bits)
|write data (32 bits)