\Syllabus, Computer Architecture

Computer Architecture
V22.0436 Fall 2005

Syllabus



This syllabus is subject to change at any time. Please visit this page often, and refresh.

Note: The sections of Patterson & Hennessy listed below are for the 2nd edition.
I will update the syllabus for the new edition as needed.



Class Date Topic Reading
1 9/7 Introduction, logic design P&H Chap. 1, Appendix B.
2 9/12 Tech is Back!, 5 Washington Place, 1st Floor  
3 9/14 Logic Design P&H Appendix B
4 9/19 Logic Design P&HAppendix B
5 9/21 Logic Design P&HAppendix B
6 9/26 Machine Instructions P&H Chapter 3
7 9/28 Machine Instructions P&H Chapter 3
8 10/3 Computer Arithmetic P&H Chapter 4
9 10/5 Computer Arithmetic P&H Chapter 4
  10/10 Columbus Day, No Class  
10 10/12 Computer Arithmetic P&H Chapter 4
11 10/17 Computer Arithmetic P&H Chapter 4
12 10/19 Computer Arithmetic P&H Chapter 4
13 10/24 Datapaths and Control P&H Chapter 5
14 10/26 Datapaths and Control P&H Chapter 5
15 10/31 Midterm Exam  
16 11/2 Datapaths and Control P&H Chapter 5
17 11/7 Datapaths and Control P&H Chapter 5
18 11/9 Datapaths and Control P&H Chapter 5
19 11/14 Pipelining P&H Chapter 6
20 11/16 Pipelining P&H Chapter 6
21 11/21 Pipelining P&H Chapter 6
22 11/23 The memory hierarchy P&H Chapter 7
23 11/28 The memory hierarchy P&H Chapter 7
24 11/30 The memory hierarchy P&H Chapter 7
25 12/5 The memory hierarchy P&H Chapter 7
26 12/7 I/O, Buses P&H Sections 8.1, 8.4, 8.5 (skim 8.2, 8.3)
27 12/12 I/O, Buses  
28 12/14 Review  
  12/21 Final Exam, 12:00pm - 1:50pm, room 102WWH