Computer Systems Org I - Prof. Grishman
Lecture 26 - Dec. 3, 2005
Computer logic (P&P chapter 3)
To add n bits, we connect together n adders. The rightmost adder can
be either a half adder or a full adder with the carry-in permanently tied
to 0. The adders are connected together with the carry out of one bit
feeding the carry in of the next bit, as shown on p. 63 of P&P.
A multiplexer selects one of two inputs (or, more generally, n inputs) and
sends that to the output. The circuit for a two-input multiplexer is
shown on p. 61 of P&P.
An ALU (Arithmetic-Logic Unit) takes two n-bit inputs and a function input,
and computes one of a small number of arithmetic or logical functions of
the two inputs. The ALU is the heart of any computer. For the
LC-3, it has to compute three functions: ADD, AND, and NOT.
The design of an ALU is very simple: we build a separate circuit for
each. Then we build a multiplexer which selects the output of the appropriate
Storage Element (P&P 3.4)
A storage or memory element is different from a combinational circuit ...
its output is not a function of its current inputs alone. It is able
to store (retain) information.
The gated D latch (P&P 3.4.2) is able to store one bit; it has
a data input and a write enable (clock) input.
A register (3.4.3) is a bunch of such latches with a common write enable